Introduction
Processor Architecture Types of Instructions Addressing Modes Instruction Register
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Understanding Instruction Register

The Instruction Register (IR) defines what operation the processor executes and how operands are selected. Understanding its structure is key to designing a processor.

Instruction Register Overview

The Instruction Register (IR) stores a single instruction in binary form. Each group of bits inside the instruction has a specific meaning, called a field.

These fields allow the processor to decode:

  • What operation to perform
  • Where input data comes from
  • Where the result should be stored

In this design, the instruction register is 32 bits wide.

Instruction Format (32-bit)


| 31 - 27 | 26 - 22 | 21 - 17 | 16 | 15 - 11 / 15 - 0 |
| Opcode  |   Rd    |   Rs1   | M  | Rs2 / Immediate  |

Each section of bits represents a specific field used during instruction execution.

Instruction Fields

1. Opcode (Bits 31 - 27)

Defines the type of operation (e.g., add, subtract, move). With 5 bits, the processor can support up to 32 different instructions.

2. Destination Register - Rd (Bits 26 - 22)

Specifies where the result will be stored. Since it is 5 bits, it can address up to 32 general-purpose registers.

3. Source Register 1 - Rs1 (Bits 21 - 17)

Provides the first input operand for the operation.

4. Mode Selection Bit - M (Bit 16)

Determines the source of the second operand:

  • M = 0: Second operand comes from a register
  • M = 1: Second operand is immediate data
5. Second Operand

Depends on the mode selection bit:

  • If M = 0 (Register Mode):
    Bits 15 - 11 represent Rs2 (second source register)
  • If M = 1 (Immediate Mode):
    Bits 15 - 0 represent immediate data (up to 16 bits)

Example Behavior

Register Mode (M = 0):


add r2, r1, r0
// r2 = r1 + r0

Immediate Mode (M = 1):


add r2, r1, #10
// r2 = r1 + 10

Key Insight

The mode selection bit makes the instruction format flexible:

  • Allows both register-based and immediate operations
  • Reduces instruction complexity
  • Optimizes instruction encoding

Summary

  • The instruction register is 32 bits wide
  • Fields define operation, operands, and destination
  • Supports up to 32 instructions and 32 registers
  • Mode bit enables flexible operand selection

Interview Questions

  • What is the purpose of the instruction register?
  • How many instructions can be encoded with 5 opcode bits?
  • What is the role of the mode selection bit?
  • How does the processor differentiate between register and immediate data?