Direct-Mapped Cache Memory

Cache memory improves system performance by storing frequently used data closer to the CPU. However, since cache is much smaller than main memory (RAM), we need a rule that determines where a block of RAM can be stored in the cache. This rule is called a mapping technique.

One of the simplest and most commonly taught mapping techniques is Direct Mapping.

Why Mapping Techniques Are Needed

The CPU generates logical addresses while executing a program. These logical addresses are converted into physical addresses by the Memory Management Unit (MMU) using a page table.

A physical address typically contains:

Frame Number – identifies the frame in RAM
Offset – identifies the byte within the frame

When cache memory exists in the system, the CPU first checks the cache before accessing RAM. Therefore, we must determine which cache line should contain the data corresponding to a given memory frame.

Mapping techniques define this relationship between RAM frames and cache lines.

Basic Memory Organization

Memory is divided into fixed-size blocks:

Process memory → Pages
RAM → Frames
Cache → Lines

A key rule is:

Page Size = Frame Size = Cache Line Size

This ensures that blocks can move easily between RAM and cache.

What is Direct Mapping?

In Direct Mapping, each frame in RAM can be placed in only one specific cache line.

The mapping rule is:


Cache Line = Frame Number mod Number of Cache Lines

This formula determines which cache line a memory block can occupy.

Example

Assume:

RAM contains 16 frames (0–15)
Cache contains 4 lines (0–3)

Using the mapping rule:


Line = Frame Number mod 4

The mapping becomes:

Frame Number	Cache Line
0	0
1	1
2	2
3	3
4	0
5	1
6	2
7	3
8	0
9	1
10	2
11	3
12	0
13	1
14	2
15	3

This means multiple frames compete for the same cache line.

For example:

Frames 0, 4, 8, and 12 all map to Cache Line 0
Only one of them can be stored in the cache at a time

How Cache Access Works

When the CPU generates an address:

The logical address is converted to a physical address.
The frame number is used to compute the cache line using the mod operation.
The system checks that cache line.
A tag comparison determines whether the correct block is present.

Two outcomes are possible:

Cache Hit: The requested block is in the cache.
Cache Miss: The block is fetched from RAM and stored in the cache line.

Address Breakdown in Direct-Mapped Cache

In a direct-mapped cache, the physical address is divided into three fields:

Tag – identifies which memory block is stored in the cache line
Index – selects the cache line
Offset – selects the byte inside the cache line


| Tag | Index | Offset |

The Index selects the cache line, while the Tag verifies whether the correct memory block is stored there.

Advantages

Very simple hardware implementation
Fast cache lookup
Low cost

Disadvantages

High conflict misses
Multiple memory blocks compete for the same cache line
Lower flexibility compared to associative caches

Summary

Direct-mapped cache associates each memory frame with exactly one cache line using a simple modulo operation. While this design is easy to implement and very fast, it suffers from conflict misses because several frames may map to the same cache line.

Direct mapping is the simplest cache mapping technique and serves as the foundation for understanding more advanced schemes such as:

Fully Associative Cache
Set-Associative Cache

Introduction

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