Introduction
Introduction Get started Hello UVM example UVM Phases Part 1 UVM Phases Part 2 UVM Base Classes UVM Object and Core Methods UVM Components
Building a Testbench
UVM Transaction UVM Sequence UVM Sequencer UVM Driver UVM Monitor UVM Scoreboard UVM Agent UVM Environment UVM Test
Other Components
Coverage Collector
Execution Model
UVM Phases Objections
Communication
TLM Basics TLM Blocking Put Port TLM Non-Blocking Put Port TLM Blocking Peek Port Analysis Ports TLM FIFO
Configuration
UVM Factory UVM Config DB
Runtime Control
UVM Plusargs Seeds & Reproducibility Verbosity Control Debug Runtime Controls
Advanced
Virtual Sequences Virtual Sequencer
UVM RAL
Intro Abstraction Flexibility Comparison Coverage Minimum Requirements Learning Path Register Types First Implementation Register with 2 Fields Register with Reserved Bits Access Policies Part 1 Access Policies Part 2 Access Policies Part 3 Access Policies Part 4 Memory Modeling Register Block Adapter Introduction Adapter Methods Adapter Example Predictor Types Desired and Mirror Values Register Methods Desired Value Mirror Value

UVM RAL – Access Policies (Part 4)

Advanced combinations, one-time write modes, and practical usage.

Overview

In this final section on access policies, we cover advanced combinations such as W1SRC, W0SRC, and specialized write-only modes.

These policies combine bit-level write behavior with automatic read-side actions or restrict operations after reset.

1. W1SRC – Write One Set, Read Clear

Write Operation:
  • Bits written as ‘1’ are set.
  • Bits written as ‘0’ remain unchanged.
Read Operation:
  • All bits are cleared in desired and mirror.

2. W1CRS – Write One Clear, Read Set

Write Operation:
  • Bits written as ‘1’ are cleared.
Read Operation:
  • All bits are set to 1.

3. W0SRC / W0CRS

These behave similarly to W1-based modes but operate on bits written as ‘0’ instead of ‘1’.

  • W0SRC: Zero bits trigger set on write, clear on read.
  • W0CRS: Zero bits trigger clear on write, set on read.

Write-Only Variants

WO – Write Only
  • Write updates desired and mirror.
  • Read generates an error.
WOC – Write Only Clear
  • Write clears all bits.
  • Read generates an error.
WOS – Write Only Set
  • Write sets all bits.
  • Read generates an error.

Special Modes – One Write After Reset

W1
  • Allows only one write after hard reset.
  • First write updates desired and mirror.
  • Subsequent writes have no effect.
  • Read behaves normally.
W01
  • Allows one write after reset.
  • Subsequent writes ignored.
  • Read generates an error.

These modes are useful for configuration registers that should be programmed only once after reset.

Practical Usage
  • RW → Used for RAM-like registers (read and write both allowed).
  • RO → Used for ROM-like registers (read allowed, write ignored).
  • Bit-modify policies (W1C, W1T, etc.) are common in status and interrupt registers.
Final Summary
  • W1SRC / W0SRC combine bit-level write with read clearing.
  • W1CRS / W0CRS combine bit-level write with read setting.
  • Write-only variants block read access.
  • W1 and W01 allow only one write after reset.
  • RW and RO remain the most commonly used policies in practice.